1. Field of the Invention
This invention relates to a semiconductor device and a method of manufacturing the same, and more specifically to a semiconductor device having a plurality of bump electrodes.
2. Description of the Related Art
As the requirements for smaller and thinner electronic devices increase, the velocity and the complexity of IC chips have become more and more higher. Accordingly, a need has arisen for higher package efficiency. Demand for miniaturization is the primary catalyst driving the usage of advanced packages such as tape carrier packages (TCP) commonly used in the manufacture of liquid crystal display (LCD) modules. The tape carrier package generally comprises a semiconductor device having bump electrodes for driving the LCD panel. Moreover, the semiconductor device having bump electrodes are also used in chip on glass (COG) technology, which permits direct attachment of chips to a glass substrate.
A conventional semiconductor device 100 comprising a plurality of bump electrodes 110 provided on a chip 120 is shown in a cross-sectional view in FIG. 8f. As shown in FIG. 8a, the chip 120 comprises a substrate 122 and a plurality of I/O contact pads 124 protected by a passivation layer 126. The chip 120 also includes a test contact pad 124a configured to permit testing of the chip 120. Bumping technology typically comprises (a) forming an under bump metallurgy (UBM) 130 on contact pads 124 of the chip, and (b) forming bump electrodes 110 on the UBM. It is noted that the test contact pad 124a is not provided with any bump electrode as well as UBM. A suitable bumping technology based on an electroplating method for fabricating the semiconductor device 100 is as follows. First, a continuous “under bump metallurgy” (UBM) layer 130 (see FIG. 8b) is formed on the pads and on the substrate between the pads. Thereafter, bump electrodes 110 are plated on the UBM layer through photoresist application (see FIG. 8c) and its patterning (see FIG. 8d).
After the photoresist pattern is stripped (see FIG. 8e), the excess UBM layer that are not covered by the bump electrodes 110 are etched away to obtain the semiconductor device 100 as shown in FIG. 8f. Specifically, the excess UBM layer can be selectively removed using etchants which attack the UBM layer preferentially with respect to the bump electrodes. However, over-etching caused by the need to completely etch away the excess UBM layer often results in attacking of the test contact pad 124a by the etchant, thereby causing damage to the circuit inside the chip. Besides, the over-etching problem even gets worse when the test contact pad 124a is not completely covered by the UBM layer due to poor step coverage of UBM sputtering process.